1. Field of the Invention
The present invention relates to a voltage regulator module (VRM) and a voltage regulating system of a central processing unit (CPU), and more particularly, to a VRM and a voltage regulating system that supply stable voltage required in the CPU, regardless of a class of the CPU, by receiving information on the required voltage from the CPU.
2. Description of the Related Art
A Central Processing Unit (CPU) of a computer requires core voltage to function. Therefore, a Voltage Regulator Module (VRM) transforms an input voltage to supply the CPU with the core voltage corresponding to the CPU.
In PENTIUM® Pro class or higher CPUs from INTEL Co., a level of the core voltage that the CPU requires may vary according to the class of the CPU. The VRM supplies the required core voltage to the CPU by receiving several Voltage Identification (VID) Signals containing information on the level of the core voltage that the CPU requires.
FIG. 1 is a control block diagram of a conventional voltage regulating system of a CPU. The conventional voltage regulating system of the CPU comprises a CPU 100 with a plurality of VID pins through which a plurality of VID signals is transmitted, and a VRM 300 that receives the VID signals from the CPU 100 and supplies the CPU 100 with the core voltage corresponding to the VID signals.
The CPU 100 is supplied with a VID voltage by a VID regulator 200 to output the VID signals through the plurality of VID pins. The PENTIUM®4, a CPU from INTEL Co., is one of the CPUs that uses a 5 bit digital VID signals from 5 VID pins. FIG. 6 illustrates an exemplary relationship between the 5 bit VID signals from the CPU 100 and the level of the core voltage from the VRM 300. As illustrated therein, the CPU 100 outputs the VID signals according to the information on the core voltage required in the CPU 100. On receiving the VID signals, the VRM 300 outputs the level of the core voltage to the CPU 100 corresponding to the VID signals.
The conventional voltage regulating system of the CPU 100 also includes a feedback/offset circuit 500. The feedback/offset circuit 500 transmits a feedback signal or an offset signal to the VRM 300, wherein each signal has two types based on logical signals (high and low) received from the CPU 100. Here, the VRM 300 stabilizes the level of the core voltage, and decides the offset value of the core voltage based on the feedback and the offset signal.
Also, a voltage control unit 130 of the VRM 300 outputs a PWM signal based on the VID signals from the CPU 100, the feedback signal, and the offset signal from the feedback/offset circuit 500. A core voltage generator 150 generates the core voltage based on the PWM signal from the voltage control unit 130.
In the conventional voltage regulating system of the CPU 100, the CPU 100 requires the core voltage with the offset value that varies according to the class of the CPU 100. As an example, to make the feedback/offset circuit 500 compatible with various CPUs, the feedback/offset circuit 500 should be capable of supporting various core voltages corresponding to the number of the CPUs, so the feedback/offset circuit 500 becomes complicated according as the number of core voltages that the feedback/offset circuit 500 should support is increased. More particularly, in a configuration of the conventional feedback/offset circuit 500 supplying two offset values, the conventional feedback/offset circuit 500 needs to be provided with more resistance elements to supply more various offset values, and more switching elements, such as field effect transistors (FETs) to select the offset value. However, the switching elements make supplying a stable core voltage harder, because the switching elements are affected by external circumstances such as manufacturing processes or temperature. Moreover, some delay in response time between the switching elements could have a bad effect on voltage regulation.
The configuration of the feedback/offset circuit 500 corresponding to every possible type of CPU 100 is hardly realizable. Therefore, in case that the voltage regulating system cannot support the level of the core voltage that the CPU 100 requires, the CPU 100 runs unstable.
FIG. 2 is a graph illustrating relationships between VID signals and a voltage Vcc in the CPU 100 when the conventional voltage regulating system can support the level of the core voltage that the CPU 100 requires. FIG. 3 is a graph illustrating relationships between the current and the voltage in the CPU 100 when the conventional voltage regulating system cannot support the level of the core voltage that the CPU 100 requires is shown in FIG. 3. As illustrated in FIG. 3, when the CPU 100 requires the level of the core voltage that the conventional voltage regulating system cannot support, the feedback/offset circuit 500 transmits the offset value incompatible with the offset value the CPU 100 requires. As a result, a percent voltage regulation differs from the value the CPU 100 requires. The percent voltage regulation, or the change rate of the voltage compared to the current applied to the CPU 100, corresponds to respective slopes of the voltage-current lines shown in FIG. 2 and FIG. 3. The voltage regulation percentages of maximum, optimal, and minimum voltages differ from each other, affecting the stable operation of the CPU 100.